Define a set associative cache design.
A. A block of main memory may be loaded into any cache line.
B. Each block of main memory is mapped to exactly one cache line.
C. A block of main memory is mapped to a group cache lines.
D. When the CPU writes a word, the data is immediately written both to cache and to main memory.
E. When the CPU reads a word, the cache writes part of a block to memory
