Assume that the drain of the n-transistor is 6um by 5.5um and the drain of the p-transistor is 18um by 5.5um
What is the gate capacitance C of the input?
What is the diffusion capacitance of the output?
Compare capacitance C to metal and poly interconnect capacitances.
What length of metal wire (3um wide) would you need to have a capacitance equal to minimum gate capacitance C?
What length of poly wire (2um wide) would you need to have a capacitance equal to minimum gate capacitance C?
Given an output load capacitance of CL=20pF, what stage ratio would you need to drive CL with a 4-stage driver (n=4) that begins with a minimum sized inverter?
Please show all your steps
